Presented at ISCA 2025

Three accepted papers, one architecture proven at scale

Brain-CA presented three accepted papers at ISCA 2025 in Tokyo, Japan — extending the architecture across learning, cognition, and CPU design. Together, they show the same first principles holding up as the scope widens.

The Papers

What we presented

MLArchSys

A Uniform, Tessellated Architecture for Energy-Efficient Learning and Inference

Presents the foundational Brain-CA architecture as a scalable grid of identical cells that learn through wave collisions and spatial patterns. The focus is on how intelligence can emerge from simple, geometric interactions — replacing central control and complex math with distributed logic.

CogArch

Brain-CA: A Dual-Speed, Low-Energy Architecture for Cognitive Learning via Cellular Automata

Introduces a biologically inspired dual-speed system that separates slow wave-based learning from fast path-based prediction. Highlights how randomness and binary modeling enable the system to adapt and reason like a cognitive agent — with minimal energy and no layered neural networks.

DCEE

Brain-CA: A Cellular Automata-Inspired Architecture for Energy-Efficient CPU Design

Reimagines the CPU itself using Brain-CA’s event-driven, decentralized architecture. Focuses on replacing traditional instruction-based processing with lightweight, embedded learning elements to drastically reduce energy consumption in data centers and general-purpose computing.

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